Course image Enablement Program for UVM
Miscellaneous
Enablement Program for UVM

Course Sections:

1. Orientation

2. Getting Started

3. Resources

4. Module 1: System Verilog

5. Module 2: UVM Basics

6. Module 3: UVM Advanced

7. Module 4: SoC-IP Verification (Capstone)

Course image RISC-V Vector Extension
Miscellaneous
RISC-V Vector Extension

Course Sections:

1. What is a vector processor

2. RVV Basic Concept and CSRs

3. RVV load/store and arithmetic instructions

Course image RISC-V Processor Design
Miscellaneous
RISC-V Processor Design

This course will be used to consolidate the learning resources that our trainees had been using for their processor design project. Future trainees will find all learning materials, videos, worksheets etc at one place.


Course Sections:

1. Resources

2. RISC V

3. Designing a Single Cycle processor

4. Project Submission