Course Sections:
1. C Language Features
2. Multi-Threading in C
3. Memory Management and File IO
4. Debugging
5. Data Structures and Algorithms
6. Grand Assessment
Course Sections:
1. RISC-V Arch Test
1.1 RISC-V-Privilege Spec
1.2 Tasks
2. Setup Content
2.1 Getting Started with RISC-V Compliance
2.2 Task: Test Plan Writing
Course Sections:
1. Getting Started (Basics)
2. Modules & Classes
3. Arrays
4. Randomization
5. Threads & Interprocess Communication
6. Testdef / Enum
7. Time Regions / Simulation Cycles
8. TestBench Basics
9. Verifications Basics Live Session
10. Writing complete test bench
11. Case Study: Memory Model
12. Coverage
13. Test Planning
14. Grand Quiz
15. Final Project
Course Sections:
1. Advance DFT
2. Advance PNR
3. Advance Sign off & SDA
4. Grand Assessment
Course Sections:
1. Lectures & Labs (For Reference)
2. SV for Design - Assignments, Lab Manuals & Worksheets
3. Grand Assessment
Course Sections:
1. Setting up your computer for the Course
2. Python Fundamentals: Basic Construct (For Pre-Assessment)
3. Pre-Assessment
4. Advanced Function Techniques
5. Iterators and Generators
6. Classes
7. Regular Expressions (Regex)
8. Virtual Environments
9. Error Handling
10. Grand Assessment
Course Sections:
1. Deep Neural Networks
2. Tuning Neural Network
3. Tuning Hyperparameters and Multiclass Classification
4. Convolutional Neural Network
5. State of Art CNN Models
6. CNN Applications
Course Sections:
1. LLVM IR Structure and IR Instructions
2. Analysis Passes
3. Transformation Passes
4. Project
5. Final Presentation
Course Sections:
1. Introduction to C++
2. Basics of C++
3. Object-Oriented Programming Basics
4. Inheritance and Polymorphism
5. Overloading
6. STL (Standard Template Library)
7. Templates
8. File Handling
9. Exception Handling
10. Concurrency and Threading
11. Project
Course Sections:
1. Orientation
2. Getting Started
3. Resources
4. Module 1: System Verilog
5. Module 2: UVM Basics
6. Module 3: UVM Advanced
7. Module 4: SoC-IP Verification (Capstone)
Course Sections:
1. What is a vector processor
2. RVV Basic Concept and CSRs
3. RVV load/store and arithmetic instructions
This course will be used to consolidate the learning resources that our
trainees had been using for their processor design project. Future
trainees will find all learning materials, videos, worksheets etc at one
place.
Course Sections:
1. Resources
2. RISC V
3. Designing a Single Cycle processor
4. Project Submission
Trainees need to take this course at the time of transitioning out of this course.
This course has 3 artifacts for conducting one on one meetings.
1. A set of slides that explains the purpose, principle and behaviors in One-on-One meetings.
2. When a person is assigned to a manager, their first meeting should be an introductory meeting, it should not be classified as a One-on-One meeting. A checklist in this course shows what is to be covered in this introductory meeting.
3. For doing a one-on-one meeting, managers should use the worksheet that has been provided and improvise as per your project and resource, while ensuring that the core structure remains in place (growth, commitment, alignment)